intel raja koduri sarchitecture day 1597317206315

announced the upcoming consumer CPU and GPU product lines and 3D Xpoint memory, manufacturing node, future chip packaging technology, new details of software at the 2020 Virtual Architecture seminar. The company’s senior vice president, chief architect, architecture, graphics and software general manager Raja Koduri and other senior engineers talked about Intel’s progress in product design and manufacturing, and provided on how Intel intends to compete now and in the future.

Starting from 11day Intel is expected to release the “Tiger Lake” Gen CPU in the first week of September. The combination of its microarchitecture and manufacturing process improvements will allow a wider frequency range than the current 10day Gen “Ice Lake” processor series. This should allow CPU cores to be scaled up or down than before to accommodate energy saving and performance goals.

The Willow Cove core in Tiger Lake CPU will scale the frequency than the current Sunny Cove core

Tiger Lake uses the “Willow Cove” CPU microarchitecture. Intel’s new internal Xe-LP integrated GPU (with up to 96 execution units) will also debut with the product line. Tiger Lake CPU also has a new cache structure and security measures to mitigate control flow attacks, as well as AI acceleration and integrated Thunderbolt 4 and USB4. PCIe4.0 and DDR5 RAM support will make this platform face the future.

Intel is touting “more than a generation improvement” in performance for this generation of products, which should make up for some of the time lost due to repeated delays in 10nm production in the past few years. PCs built with Tiger Lake CPUs are expected to go on sale at the end of 2020. Since then, no further announcements have been made to transition the delay to 7nm.

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The company has removed the confusing “+” suffix and instead used the term “10nm SuperFin” to mark the latest improvements in its 10nm process. Intel calls it the largest in-node enhancement ever, because it improves the structure of FinFET transistors to performance and power efficiency without drastically reducing manufacturing size. It is said that SuperFin transistors can achieve better current flow through improved interconnection, lower resistance and lower voltage drop.

Intel superfin Intel

Intel claims that its intergenerational advancements have greatly improved performance

The improvement of SuperFin transistors is achieved by using a “superlattice” structure of high-K dielectric materials in a stack with a thickness of only a few angstroms. Intel said that this is an industry-leading development, ahead of competitors, and has been used on Tiger Lake chips.

Although the Xe-LP (low power consumption) integrated GPU will be launched in 2020, Intel has also formulated the Xe plan in detail to expand to discrete graphics cards, enthusiast-level gaming PCs, servers, and data center applications. Xe-LP is just an implementation and optimized for size and power consumption. It has up to 96 execution units, will support asynchronous calculation, artificial intelligence inference, updated media encoding/decoding engine, 12-bit color, four display pipes, variable rate shadows, adaptive sharpening and adaptive synchronization, Variable refresh rate up to 360Hz. .

Xe-LP’s 15W packaged gaming performance is said to meet or exceed Intel’s current Gen11 integrated GPU performance in a 25W package. Intel said that users can expect to run games at a higher frame rate than the current integrated GPU can manage at low settings.

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For PC gamers, Intel announced that it will launch a new Xe-HPG implementation of its high-power Xe-HP GPU in 2021. So far, the only confirmed details are that it will support hardware ray tracing and use GDDR6 memory. Interestingly, the GPU will be manufactured using a third-party foundry and using external processing technology. Intel recently stated that it will begin to improve the ability of its products to market.

Intel XE Chart Intel

Xe graphics architecture extends from ultraportable computers to data center servers and supercomputers

The high-end Xe-HP variants are designed to be scalable to support high-end media encoding and streaming and AI acceleration in the data center. Demonstrated simultaneous transcoding of 10 4K 60fps video streams on a modular logic module, of which up to four modules can be implemented on the GPU.

In other announcements, Intel confirmed that Alder Lake will be the next hybrid CPU design after Lakefield. It will combine the next-generation Golden Cove and Gracemont cores to achieve flexibility, functionality and efficiency. There are no more details, including the launch schedule, but it is widely expected that Old Lake will become the basis for the 12th launch Gen series desktop and notebook computers.

For servers and data centers, Intel will release the next-generation Xeon scalable CPU based on the Ice Lake-SP architecture later this year, supporting total memory encryption and PCIe 4.0. After that, the Sapphire Rapids generation will utilize 10nm SuperFin transistors and support PCIe 5.0 with DDR5 memory.

Intel also demonstrated its FPGA product line, 3D Xpoint persistent memory, 144-layer 3D NAND flash memory, Loihi neuromorphic processing research, next-generation Foveros and EMIB packaging technology, OneAPI programming model, and updates to DevCloud developer tools.

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